Verilog ALU
VerilogModelSimFPGA
Overview
A hardware description of an 8-bit Arithmetic Logic Unit implemented in Verilog. The ALU supports a comprehensive set of operations including addition, subtraction, multiplication, and bitwise operations. It includes status flag outputs for carry, overflow, zero, and negative results, enabling integration into larger processor designs.
Key Features
- Full 8-bit arithmetic operations (add, subtract, multiply)
- Bitwise operations (AND, OR, XOR, NOT, shift)
- Status flags: carry, overflow, zero, negative
- Synthesizable for FPGA implementation
- Comprehensive testbench with edge case coverage
8-bit ALU Simulator
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ALU+
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CCarry
VOverflow
ZZero
NNegative